Reference

arch(7)

Architecture-specific details

NAME

arch – Architecture-specific details

DESCRIPTION

Differences between CPU architectures and platforms supported by FreeBSD.

Introduction

This document is a quick reference of key ABI details of FreeBSD architecture ports. For full details consult the processor-specific ABI supplement documentation.

If not explicitly mentioned, sizes are in bytes. The architecture details in this document apply to FreeBSD 13.0 and later, unless otherwise noted.

FreeBSD uses a flat address space. Variables of types unsigned long, ptraddr_t, and size_t have the same representation.

In order to maximize compatibility with future pointer integrity mechanisms, manipulations of pointers as integers should be performed via uintptr_t or intptr_t and no other types as these types are the only integer types where the C standard guarantees that a pointer may be cast to it and then cast back to the original type. On CHERI systems, uintptr_t and intptr_t are defined as __uintcap_t and __intcap_t which represent capabilities that can be manipulated by integer operations. Pointers should not be cast to long, ptrdiff_t, or size_t if they will later be cast back to a pointer that is expected to be dereferenceable as they remain bare integer types on all architectures.

On some architectures, e.g., AIM variants of powerpc64, the kernel uses a separate address space. On other architectures, kernel and a user mode process share a single address space. The kernel is located at the highest addresses.

On each architecture, the main user mode thread's stack starts near the highest user address and grows down.

FreeBSD architecture support varies by release. This table shows currently supported CPU architectures along with the first FreeBSD release to support each architecture.

ArchitectureInitial Release
aarch6411.0
aarch64c16.0 (planned)
amd645.1
armv712.0
powerpc649.0
powerpc64le13.0
riscv6412.0
riscv64c16.0 (planned)

Discontinued architectures are shown in the following table.

ArchitectureInitial ReleaseFinal Release
alpha3.26.4
arm6.012.4
armeb8.011.4
armv610.014.x
ia645.010.4
i3861.014.x
mips8.013.5
mipsel9.013.5
mipselhf12.013.5
mipshf12.013.5
mipsn329.013.5
mips649.013.5
mips64el9.013.5
mips64elhf12.013.5
mips64hf12.013.5
pc982.211.4
powerpc6.014.x
powerpcspe12.014.x
riscv64sf12.013.5
sparc645.012.4

Type Sizes

All FreeBSD architectures use some variant of the ELF (see elf(5)) Application Binary Interface (ABI) for the machine processor. Supported ABIs can be divided into three main groups:

ILP32

int, intptr_t, long, and void * types machine representations all have 4-byte size.

LP64

int type machine representation uses 4 bytes, while intptr_t, long, and void * are 8 bytes.

L64PC128

int type machine representation uses 4 bytes. long type machine representation uses 8 bytes. intptr_t and void * are 16 byte capabilities.

Some machines support more than one FreeBSD ABI. Typically these are 64-bit machines, where the “native” LP64 execution environment is accompanied by the “legacy” ILP32 environment, which was the historical 32-bit predecessor for 64-bit evolution. Examples are:

LP64ILP32 counterpart
amd64i386
powerpc64powerpc
aarch64armv7

aarch64 will support execution of armv7 binaries if the CPU implements AArch32 execution state. Binaries targeting armv6 and earlier are no longer supported by FreeBSD.

Architectures with 128-bit capabilities support both a “native” L64PC128 execution environment and a LP64 environment:

L64PC128LP64 counterpart
aarch64caarch64
riscv64criscv64

On all supported architectures:

TypeSize
short2
int4
long long8
float4
double8

Integers are represented in two's complement. Alignment of integer and pointer types is natural, that is, the address of the variable must be congruent to zero modulo the type size. The sole exception is that i386 requires only 4-byte alignment for 64-bit integers.

Machine-dependent type sizes:

Architecturelongvoid *long doubletime_t
aarch6488168
aarch64c816168
amd6488168
armv74488
i38644124
powerpc4488
powerpc648888
powerpc64le88168
riscv6488168
riscv64c816168

time_t is 8 bytes on all supported architectures except i386.

Endianness and char Signedness

ArchitectureEndiannesschar Signednesswchar_t Signedness
aarch64littleunsignedunsigned
aarch64clittleunsignedunsigned
amd64littlesignedsigned
armv7littleunsignedunsigned
i386littlesignedsigned
powerpcbigunsignedsigned
powerpc64bigunsignedsigned
powerpc64lelittleunsignedsigned
riscv64littlesignedsigned
riscv64clittlesignedsigned

Page Size

ArchitecturePage Sizes
aarch644K, 64K, 2M, 1G
aarch64c4K, 64K, 2M, 1G
amd644K, 2M, 1G
armv74K, 1M
i3864K, 2M (PAE), 4M
powerpc4K
powerpc644K
powerpc64le4K
riscv644K, 2M, 1G
riscv64c4K, 2M, 1G

User Address Space Layout

ArchitectureMaximum AddressAddress Space Size
aarch640x0001000000000000256TiB
aarch64c0x0001000000000000256TiB
amd64 (LA48)0x0000800000000000128TiB
amd64 (LA57)0x010000000000000064PiB
armv70xbfc000003GiB
i3860xffc000004GiB
powerpc0xfffff0004GiB
powerpc640x000fffffc00000004PiB
powerpc64le0x000fffffc00000004PiB
riscv64 (Sv39)0x0000004000000000256GiB
riscv64c (Sv39)0x0000004000000000256GiB
riscv64 (Sv48)0x0000800000000000128TiB
riscv64c (Sv48)0x0000800000000000128TiB

The layout of a process' address space can be queried via the KERN_PROC_VM_LAYOUT sysctl(3) MIB.

Historically, amd64 CPUs were limited to a 48-bit virtual address space. Newer CPUs support 5-level page tables, which extend the significant bits of addresses to 57 bits (LA57 mode). The address space layout is determined by the CPU's support for LA57. Setting the vm.pmap.la57 tunable to 0 forces the system into 4-level paging mode, even on hardware that supports 5-level paging. In this mode, all processes get a 48-bit address space. The vm.pmap.prefer_la48_uva tunable determines whether processes running on a LA57 system are limited to a 48-bit address space by default. Some applications make use of unused upper bits in pointer values to store information, and thus implicitly assume they are running in LA48 mode. To avoid breaking compatibility, all processes run in LA48 mode by default. The elfctl(1) utility can be used to request LA48 or LA57 mode for specific executables. Similarly, proccontrol(1) can be used to configure the address space layout when executing a process.

The RISC-V specification permits 3-level (Sv39), 4-level (Sv48), and 5-level (Sv57) page tables. Hardware is only required to implement Sv39; implementations which support Sv48 must also support Sv39, and implementations which support Sv57 must also support Sv48. The vm.pmap.mode tunable can be used to select the layout. FreeBSD currently supports Sv39 and Sv48 and defaults to using Sv39.

Floating Point

Architecturefloat, doublelong double
aarch64hardsoft, quad precision
aarch64chardsoft, quad precision
amd64hardhard, 80 bit
armv7hardhard, double precision
i386hardhard, 80 bit
powerpchardhard, double precision
powerpc64hardhard, double precision
powerpc64lehardsoft, quad precision
riscv64hardhard, quad precision
riscv64chardhard, quad precision

Default Tool Chain

FreeBSD uses clang(1) as the default compiler on all supported CPU architectures, LLVM's ld.lld(1) as the default linker, and LLVM binary utilities such as objcopy(1) and readelf(1).

MACHINE_ARCH vs MACHINE_CPUARCH vs MACHINE

MACHINE_CPUARCH should be preferred in Makefiles when the generic architecture is being tested. MACHINE_ARCH should be preferred when there is something specific to a particular type of architecture where there is a choice of many, or could be a choice of many. Use MACHINE when referring to the kernel, interfaces dependent on a specific type of kernel or similar things like boot sequences.

MACHINEMACHINE_CPUARCHMACHINE_ARCH
arm64aarch64aarch64, aarch64c
amd64amd64amd64
armarmarmv7
i386i386i386
powerpcpowerpcpowerpc, powerpc64, powerpc64le
riscvriscvriscv64, riscv64c

Predefined Macros

The compiler provides a number of predefined macros. Some of these provide architecture-specific details and are explained below. Other macros, including those required by the language standard, are not included here.

The full set of predefined macros can be obtained with this command:

cc -x c -dM -E /dev/null

Common type size and endianness macros:

MacroMeaning
__SIZEOF_LONG__size in bytes of long
__SIZEOF_POINTER__size in bytes of intptr_t and pointers
__SIZEOF_SIZE_T__size in bytes of size_t
__LP64__64-bit (8-byte) long and pointer, 32-bit (4-byte) int
__ILP32__32-bit (4-byte) int, long and pointer
__CHERI__128-bit (16-byte) capability pointer, 64-bit (8-byte) long
BYTE_ORDEREither BIG_ENDIAN or LITTLE_ENDIAN.

Because systems were historically either __ILP32__ or __LP64__ it has been common for programmers to test only one and assume the other one in an else branch. With the arrival of CHERI architectures, this is no longer the case. __SIZEOF_*__ macros should be used instead. New uses of __ILP32__ and __LP64__ should be avoided. Compilers for CHERI targets do not define __LP64__ as their pointers are 128-bit capabilities.

Architecture-specific macros:

ArchitecturePredefined macros
aarch64__aarch64__
aarch64c__aarch64__, __CHERI__
amd64__amd64__, __x86_64__
armv7__arm__, __ARM_ARCH >= 7
i386__i386__
powerpc__powerpc__
powerpc64__powerpc__, __powerpc64__
powerpc64le__powerpc__, __powerpc64__
riscv64__riscv, __riscv_xlen == 64
riscv64c__riscv, __riscv_xlen == 64, __CHERI__

Compilers may define additional variants of architecture-specific macros. The macros above are preferred for use in FreeBSD.

Important Xr make 1 variables

Most of the externally settable variables are defined in the build(7) man page. These variables are not otherwise documented and are used extensively in the build system.

MACHINE

Represents the hardware platform. This is the same as the native platform's uname(1) -m output. It defines both the userland / kernel interface, as well as the bootloader / kernel interface. It should only be used in these contexts. Each CPU architecture may have multiple hardware platforms it supports where MACHINE differs among them. It is used to collect together all the files from config(8) to build the kernel. It is often the same as MACHINE_ARCH just as one CPU architecture can be implemented by many different hardware platforms, one hardware platform may support multiple CPU architecture family members, though with different binaries. For example, MACHINE of i386 supported the IBM-AT hardware platform while the MACHINE of pc98 supported the Japanese company NEC's PC-9801 and PC-9821 hardware platforms. Both of these hardware platforms supported only the MACHINE_ARCH of i386 where they shared a common ABI, except for certain kernel / userland interfaces relating to underlying hardware platform differences in bus architecture, device enumeration and boot interface. Generally, MACHINE should only be used in src/sys and src/stand or in system imagers or installers.

MACHINE_ARCH

Represents the CPU processor architecture. This is the same as the native platforms uname(1) -p output. It defines the CPU instruction family supported. It may also encode a variation in the byte ordering of multi-byte integers (endian). It may also encode a variation in the size of the integer or pointer. It may also encode a ISA revision. It may also encode hard versus soft floating point ABI and usage. It may also encode a variant ABI when the other factors do not uniquely define the ABI. It, along with MACHINE, defines the ABI used by the system. Generally, the plain CPU name specifies the most common (or at least first) variant of the CPU. This is why powerpc and powerpc64 imply 'big endian' while armv7 and aarch64 imply little endian. If we ever were to support the so-called x32 ABI (using 32-bit pointers on the amd64 architecture), it would most likely be encoded as amd64-x32. It is unfortunate that amd64 specifies the 64-bit evolution of the x86 platform (it matches the 'first rule') as almost everybody else uses x86_64. The FreeBSD port was so early, it predated processor name standardization after Intel joined the market. At the time, each OS selected its own conventions. Backwards compatibility means it is not easy to change to the consensus name.

MACHINE_CPUARCH

Represents the source location for a given MACHINE_ARCH. It is generally the common prefix for all the MACHINE_ARCH that share the same implementation, though 'riscv' breaks this rule. While amd64 and i386 are closely related, MACHINE_CPUARCH is not x86 for them. The FreeBSD source base supports amd64 and i386 with two distinct source bases living in subdirectories named amd64 and i386 (though behind the scenes there's some sharing that fits into this framework).

CPUTYPE

Sets the flavor of MACHINE_ARCH to build. It is used to optimize the build for a specific CPU / core that the binaries run on. Generally, this does not change the ABI, though it can be a fine line between optimization for specific cases.

TARGET

Used to set MACHINE in the top level Makefile for cross building. Unused outside of that scope. It is not passed down to the rest of the build. Makefiles outside of the top level should not use it at all (though some have their own private copy for historical reasons).

TARGET_ARCH

Used to set MACHINE_ARCH by the top level Makefile for cross building. Like TARGET, it is unused outside of that scope.

SEE ALSO

elfctl(1), proccontrol(1), sysctl(3), src.conf(5), build(7), simd(7)

HISTORY

An arch manual page appeared in FreeBSD 11.1.

History