--- name: "struct_spi_master" section: "9" platform: "linux" package: "linux-manual-3.16" version: "3.16.56-1+deb8u1" release: "Debian 8 (Jessie)" platforms: ["linux"] url: "https://new.carta.tech/struct_spi_master" --- # struct\_spi\_master(9) interface to SPI master controller ## NAME struct\_spi\_master - interface to SPI master controller ## SYNOPSIS ``` struct spi_master { struct device dev; struct list_head list; s16 bus_num; u16 num_chipselect; u16 dma_alignment; u16 mode_bits; u32 bits_per_word_mask; #define SPI_BPW_MASK(bits) BIT((bits) - 1) #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) #define SPI_BPW_RANGE_MASK(min# max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1)) u32 min_speed_hz; u32 max_speed_hz; u16 flags; #define SPI_MASTER_HALF_DUPLEX BIT(0) #define SPI_MASTER_NO_RX BIT(1) #define SPI_MASTER_NO_TX BIT(2) #define SPI_MASTER_MUST_RX BIT(3) #define SPI_MASTER_MUST_TX BIT(4) spinlock_t bus_lock_spinlock; struct mutex bus_lock_mutex; bool bus_lock_flag; int (* setup) (struct spi_device *spi); int (* transfer) (struct spi_device *spi,struct spi_message *mesg); void (* cleanup) (struct spi_device *spi); bool queued; struct kthread_worker kworker; struct task_struct * kworker_task; struct kthread_work pump_messages; spinlock_t queue_lock; struct list_head queue; struct spi_message * cur_msg; bool busy; bool running; bool rt; bool auto_runtime_pm; bool cur_msg_prepared; struct completion xfer_completion; size_t max_dma_len; int (* prepare_transfer_hardware) (struct spi_master *master); int (* transfer_one_message) (struct spi_master *master,struct spi_message *mesg); int (* unprepare_transfer_hardware) (struct spi_master *master); int (* prepare_message) (struct spi_master *master,struct spi_message *message); int (* unprepare_message) (struct spi_master *master,struct spi_message *message); void (* set_cs) (struct spi_device *spi, bool enable); int (* transfer_one) (struct spi_master *master, struct spi_device *spi,struct spi_transfer *transfer); int * cs_gpios; }; ``` ## MEMBERS dev device interface to this driver list link with the global spi\_master list bus\_num board-specific (and often SOC-specific) identifier for a given SPI controller. num\_chipselect chipselects are used to distinguish individual SPI slaves, and are numbered from zero to num\_chipselects. each slave has a chipselect signal, but it's common that not every chipselect is connected to a slave. dma\_alignment SPI controller constraint on DMA buffers alignment. mode\_bits flags understood by this controller driver bits\_per\_word\_mask A mask indicating which values of bits\_per\_word are supported by the driver. Bit n indicates that a bits\_per\_word n+1 is supported. If set, the SPI core will reject any transfer with an unsupported bits\_per\_word. If not set, this value is simply ignored, and it's up to the individual driver to perform any validation. min\_speed\_hz Lowest supported transfer speed max\_speed\_hz Highest supported transfer speed flags other constraints relevant to this driver bus\_lock\_spinlock spinlock for SPI bus locking bus\_lock\_mutex mutex for SPI bus locking bus\_lock\_flag indicates that the SPI bus is locked for exclusive use setup updates the device mode and clocking records used by a device's SPI controller; protocol code may call this. This must fail if an unrecognized or unsupported mode is requested. It's always safe to call this unless transfers are pending on the device whose settings are being modified. transfer adds a message to the controller's transfer queue. cleanup frees controller-specific state queued whether this master is providing an internal message queue kworker thread struct for message pump kworker\_task pointer to task for message pump kworker thread pump\_messages work struct for scheduling work to the message pump queue\_lock spinlock to syncronise access to message queue queue message queue cur\_msg the currently in-flight message busy message pump is busy running message pump is running rt whether this queue is set to run as a realtime task auto\_runtime\_pm the core should ensure a runtime PM reference is held while the hardware is prepared, using the parent device for the spidev cur\_msg\_prepared spi\_prepare\_message was called for the currently in-flight message xfer\_completion used by core **transfer\_one\_message** max\_dma\_len Maximum length of a DMA transfer for the device. prepare\_transfer\_hardware a message will soon arrive from the queue so the subsystem requests the driver to prepare the transfer hardware by issuing this call transfer\_one\_message the subsystem calls the driver to transfer a single message while queuing transfers that arrive in the meantime. When the driver is finished with this message, it must call **spi\_finalize\_current\_message** so the subsystem can issue the next message unprepare\_transfer\_hardware there are currently no more messages on the queue so the subsystem notifies the driver that it may relax the hardware by issuing this call prepare\_message set up the controller to transfer a single message, for example doing DMA mapping. Called from threaded context. unprepare\_message undo any work done by **prepare\_message**. set\_cs set the logic level of the chip select line. May be called from interrupt context. transfer\_one transfer a single spi\_transfer. - return 0 if the transfer is finished, - return 1 if the transfer is still in progress. When the driver is finished with this transfer it must call **spi\_finalize\_current\_transfer** so the subsystem can issue the next transfer. Note: transfer\_one and transfer\_one\_message are mutually exclusive; when both are set, the generic subsystem does not call your transfer\_one callback. cs\_gpios Array of GPIOs to use as chip select lines; one per CS number. Any individual value may be -ENOENT for CS lines that are not GPIOs (driven by the SPI controller itself). ## DESCRIPTION Each SPI master controller can communicate with one or more *spi\_device* children. These make a small bus, sharing MOSI, MISO and SCK signals but not chip select signals. Each device may be configured to use a different clock rate, since those shared signals are ignored unless the chip is selected. The driver for an SPI controller manages access to those devices through a queue of spi\_message transactions, copying data between CPU memory and an SPI slave device. For each such message it queues, it calls the message's completion function when the transaction completes. ## COPYRIGHT