---
name: "struct_irq_chip_generic"
section: "9"
platform: "linux"
package: "linux-manual-4.9"
version: "4.9.228-1"
release: "Debian 9 (Stretch)"
platforms: ["linux"]
url: "https://new.carta.tech/struct_irq_chip_generic"
---

# struct\_irq\_chip\_generic(9)

Generic irq chip data structure

## NAME

struct\_irq\_chip\_generic - Generic irq chip data structure

## SYNOPSIS

```
struct irq_chip_generic {
  raw_spinlock_t lock;
  void __iomem * reg_base;
  u32 (* reg_readl) (void __iomem *addr);
  void (* reg_writel) (u32 val, void __iomem *addr);
  void (* suspend) (struct irq_chip_generic *gc);
  void (* resume) (struct irq_chip_generic *gc);
  unsigned int irq_base;
  unsigned int irq_cnt;
  u32 mask_cache;
  u32 type_cache;
  u32 polarity_cache;
  u32 wake_enabled;
  u32 wake_active;
  unsigned int num_ct;
  void * private;
  unsigned long installed;
  unsigned long unused;
  struct irq_domain * domain;
  struct list_head list;
  struct irq_chip_type chip_types[0];
};
```

## MEMBERS

lock

Lock to protect register and cache data access

reg\_base

Register base address (virtual)

reg\_readl

Alternate I/O accessor (defaults to readl if NULL)

reg\_writel

Alternate I/O accessor (defaults to writel if NULL)

suspend

Function called from core code on suspend once per chip; can be useful instead of irq\_chip::suspend to handle chip details even when no interrupts are in use

resume

Function called from core code on resume once per chip; can be useful instead of irq\_chip::suspend to handle chip details even when no interrupts are in use

irq\_base

Interrupt base nr for this chip

irq\_cnt

Number of interrupts handled by this chip

mask\_cache

Cached mask register shared between all chip types

type\_cache

Cached type register

polarity\_cache

Cached polarity register

wake\_enabled

Interrupt can wakeup from suspend

wake\_active

Interrupt is marked as an wakeup from suspend source

num\_ct

Number of available irq\_chip\_type instances (usually 1)

private

Private data for non generic chip callbacks

installed

bitfield to denote installed interrupts

unused

bitfield to denote unused interrupts

domain

irq domain pointer

list

List head for keeping track of instances

chip\_types\[0\]

Array of interrupt irq\_chip\_types

## DESCRIPTION

Note, that irq\_chip\_generic can have multiple irq\_chip\_type implementations which can be associated to a particular irq line of an irq\_chip\_generic instance. That allows to share and protect state in an irq\_chip\_generic instance when we need to implement different flow mechanisms (level/edge) for it.

## AUTHORS

**Thomas Gleixner** \<tglx@linutronix.de\>

Author.

**Ingo Molnar** \<mingo@elte.hu\>

Author.

## COPYRIGHT