---
name: "rte_pause.h"
section: "3"
platform: "linux"
package: "dpdk-doc"
version: "24.11.4-0+deb13u1"
release: "Debian 13 (Trixie)"
platforms: ["linux"]
url: "https://new.carta.tech/rte_pause.h"
---

# rte\_pause.h(3)

## NAME

rte\_pause.h

## SYNOPSIS

`#include <stdint.h>`\
 `#include <assert.h>`\
 `#include <rte_common.h>`\
 `#include <rte_atomic.h>`\
 `#include <rte_stdatomic.h>`\

### Functions

static void **rte\_pause** (void)\
 static **\_\_rte\_always\_inline** void **rte\_wait\_until\_equal\_16** (volatile uint16\_t \*addr, uint16\_t expected, rte\_memory\_order memorder)\
 static **\_\_rte\_always\_inline** void **rte\_wait\_until\_equal\_32** (volatile uint32\_t \*addr, uint32\_t expected, rte\_memory\_order memorder)\
 static **\_\_rte\_always\_inline** void **rte\_wait\_until\_equal\_64** (volatile uint64\_t \*addr, uint64\_t expected, rte\_memory\_order memorder)\

## Detailed Description

CPU pause operation.

Definition in file **rte\_pause.h**.

## Function Documentation

### static void rte\_pause (void)` [inline]`, ` [static]`

Pause CPU execution for a short while

This call is intended for tight loops which poll a shared resource or wait for an event. A short pause within the loop may reduce the power consumption.

### static \_\_rte\_always\_inline void rte\_wait\_until\_equal\_16 (volatile uint16\_t \* addr, uint16\_t expected, rte\_memory\_order memorder)` [static]`

Wait for \*addr to be updated with a 16-bit expected value, with a relaxed memory ordering model meaning the loads around this API can be reordered.

**Parameters**

*addr* A pointer to the memory location. \
 *expected* A 16-bit expected value to be in the memory location. \
 *memorder* Two different memory orders that can be specified: rte\_memory\_order\_acquire and rte\_memory\_order\_relaxed.

Definition at line **84** of file **rte\_pause.h**.

### static \_\_rte\_always\_inline void rte\_wait\_until\_equal\_32 (volatile uint32\_t \* addr, uint32\_t expected, rte\_memory\_order memorder)` [static]`

Wait for \*addr to be updated with a 32-bit expected value, with a relaxed memory ordering model meaning the loads around this API can be reordered.

**Parameters**

*addr* A pointer to the memory location. \
 *expected* A 32-bit expected value to be in the memory location. \
 *memorder* Two different memory orders that can be specified: rte\_memory\_order\_acquire and rte\_memory\_order\_relaxed.

Definition at line **95** of file **rte\_pause.h**.

### static \_\_rte\_always\_inline void rte\_wait\_until\_equal\_64 (volatile uint64\_t \* addr, uint64\_t expected, rte\_memory\_order memorder)` [static]`

Wait for \*addr to be updated with a 64-bit expected value, with a relaxed memory ordering model meaning the loads around this API can be reordered.

**Parameters**

*addr* A pointer to the memory location. \
 *expected* A 64-bit expected value to be in the memory location. \
 *memorder* Two different memory orders that can be specified: rte\_memory\_order\_acquire and rte\_memory\_order\_relaxed.

Definition at line **106** of file **rte\_pause.h**.

## Author

Generated automatically by Doxygen for DPDK from the source code.