---
name: "rte_io.h"
section: "3"
platform: "linux"
package: "dpdk-doc"
version: "24.11.4-0+deb13u1"
release: "Debian 13 (Trixie)"
platforms: ["linux"]
url: "https://new.carta.tech/rte_io.h"
---

# rte\_io.h(3)

## NAME

rte\_io.h

## SYNOPSIS

`#include <stdint.h>`\
 `#include <rte_common.h>`\
 `#include <rte_compat.h>`\
 `#include <rte_atomic.h>`\

### Functions

static uint8\_t **rte\_read8\_relaxed** (const volatile void \*addr)\
 static uint16\_t **rte\_read16\_relaxed** (const volatile void \*addr)\
 static uint32\_t **rte\_read32\_relaxed** (const volatile void \*addr)\
 static uint64\_t **rte\_read64\_relaxed** (const volatile void \*addr)\
 static void **rte\_write8\_relaxed** (uint8\_t value, volatile void \*addr)\
 static void **rte\_write16\_relaxed** (uint16\_t value, volatile void \*addr)\
 static void **rte\_write32\_relaxed** (uint32\_t value, volatile void \*addr)\
 static void **rte\_write64\_relaxed** (uint64\_t value, volatile void \*addr)\
 static uint8\_t **rte\_read8** (const volatile void \*addr)\
 static uint16\_t **rte\_read16** (const volatile void \*addr)\
 static uint32\_t **rte\_read32** (const volatile void \*addr)\
 static uint64\_t **rte\_read64** (const volatile void \*addr)\
 static void **rte\_write8** (uint8\_t value, volatile void \*addr)\
 static void **rte\_write16** (uint16\_t value, volatile void \*addr)\
 static void **rte\_write32** (uint32\_t value, volatile void \*addr)\
 static void **rte\_write64** (uint64\_t value, volatile void \*addr)\
 static \_\_rte\_experimental void **rte\_write32\_wc** (uint32\_t value, volatile void \*addr)\
 static \_\_rte\_experimental void **rte\_write32\_wc\_relaxed** (uint32\_t value, volatile void \*addr)\

## Detailed Description

I/O device memory operations

This file defines the generic API for I/O device memory read/write operations

Definition in file **rte\_io.h**.

## Function Documentation

### static \_\_rte\_always\_inline uint8\_t rte\_read8\_relaxed (const volatile void \* addr)` [inline]`, ` [static]`

Read a 8-bit value from I/O device memory address *addr*.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*addr* I/O memory address to read the value from

**Returns**

read value

Definition at line **276** of file **rte\_io.h**.

### static \_\_rte\_always\_inline uint16\_t rte\_read16\_relaxed (const volatile void \* addr)` [inline]`, ` [static]`

Read a 16-bit value from I/O device memory address *addr*.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*addr* I/O memory address to read the value from

**Returns**

read value

Definition at line **282** of file **rte\_io.h**.

### static \_\_rte\_always\_inline uint32\_t rte\_read32\_relaxed (const volatile void \* addr)` [inline]`, ` [static]`

Read a 32-bit value from I/O device memory address *addr*.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*addr* I/O memory address to read the value from

**Returns**

read value

Definition at line **288** of file **rte\_io.h**.

### static \_\_rte\_always\_inline uint64\_t rte\_read64\_relaxed (const volatile void \* addr)` [inline]`, ` [static]`

Read a 64-bit value from I/O device memory address *addr*.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*addr* I/O memory address to read the value from

**Returns**

read value

Definition at line **294** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write8\_relaxed (uint8\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 8-bit value to I/O device memory address *addr*.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **300** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write16\_relaxed (uint16\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 16-bit value to I/O device memory address *addr*.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **306** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write32\_relaxed (uint32\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 32-bit value to I/O device memory address *addr*.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **312** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write64\_relaxed (uint64\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 64-bit value to I/O device memory address *addr*.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **318** of file **rte\_io.h**.

### static \_\_rte\_always\_inline uint8\_t rte\_read8 (const volatile void \* addr)` [inline]`, ` [static]`

Read a 8-bit value from I/O device memory address *addr*.

**Parameters**

*addr* I/O memory address to read the value from

**Returns**

read value

Definition at line **324** of file **rte\_io.h**.

### static \_\_rte\_always\_inline uint16\_t rte\_read16 (const volatile void \* addr)` [inline]`, ` [static]`

Read a 16-bit value from I/O device memory address *addr*.

**Parameters**

*addr* I/O memory address to read the value from

**Returns**

read value

Definition at line **333** of file **rte\_io.h**.

### static \_\_rte\_always\_inline uint32\_t rte\_read32 (const volatile void \* addr)` [inline]`, ` [static]`

Read a 32-bit value from I/O device memory address *addr*.

**Parameters**

*addr* I/O memory address to read the value from

**Returns**

read value

Definition at line **342** of file **rte\_io.h**.

### static \_\_rte\_always\_inline uint64\_t rte\_read64 (const volatile void \* addr)` [inline]`, ` [static]`

Read a 64-bit value from I/O device memory address *addr*.

**Parameters**

*addr* I/O memory address to read the value from

**Returns**

read value

Definition at line **351** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write8 (uint8\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 8-bit value to I/O device memory address *addr*.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **360** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write16 (uint16\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 16-bit value to I/O device memory address *addr*.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **367** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write32 (uint32\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 32-bit value to I/O device memory address *addr*.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **374** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write64 (uint64\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 64-bit value to I/O device memory address *addr*.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **381** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write32\_wc (uint32\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 32-bit value to I/O device memory address addr using write combining memory write protocol. Depending on the platform write combining may not be available and/or may be treated as a hint and the behavior may fallback to a regular store.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **389** of file **rte\_io.h**.

### static \_\_rte\_always\_inline void rte\_write32\_wc\_relaxed (uint32\_t value, volatile void \* addr)` [inline]`, ` [static]`

Write a 32-bit value to I/O device memory address addr using write combining memory write protocol. Depending on the platform write combining may not be available and/or may be treated as a hint and the behavior may fallback to a regular store.

The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access.

**Parameters**

*value* Value to write \
 *addr* I/O memory address to write the value to

Definition at line **395** of file **rte\_io.h**.

## Author

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