---
name: "rfnoc_image_builder"
section: "1"
platform: "linux"
package: "libuhd"
version: "4.9.0.1-8"
release: "Arch Linux 2026-11-01"
platforms: ["linux"]
url: "https://new.carta.tech/rfnoc_image_builder"
---

# rfnoc\_image\_builder(1)

Build UHD image using RFNoC blocks.

## NAME

rfnoc\_image\_builder - Build UHD image using RFNoC blocks.

## USAGE

rfnoc\_image\_builder \[-h\] (**-y** YAML\_CONFIG \| **-r** GRC\_CONFIG) \[-C BASE\_DIR\] \[-F FPGA\_DIR\] \[-B BUILD\_DIR\] \[-O BUILD\_OUTPUT\_DIR\] \[-E BUILD\_IP\_DIR\] \[-o IMAGE\_CORE\_OUTPUT\] \[-I INCLUDE\_DIR\] \[-b GRC\_BLOCKS\] \[-l LOG\_LEVEL\] \[-R\] \[-G\] \[-W\] \[-S SECURE\_CORE\] \[-K SECURE\_KEY\] \[-d DEVICE\] \[-n IMAGE\_CORE\_NAME\] \[-t TARGET\] \[-g\] \[-Y\] \[--CHECK\] \[-s\] \[-P\] \[-j JOBS\] \[-c\] \[-p VIVADO\_PATH\] \[-H\] \[-D\] \[--color {never,auto,always}\]

### optional arguments:

- **-h**, **--help**

  show a help message and exit

- **-y** YAML\_CONFIG, **--yaml-config** YAML\_CONFIG

  Path to YAML configuration file (image core file). Either this option or **--grc-config** is required.

- **-r** GRC\_CONFIG, **--grc-config** GRC\_CONFIG

  Path to .grc file to generate config from

- **-C** BASE\_DIR, `--base-dir` BASE\_DIR

  Path to the base directory. Defaults to the current directory.

- **-F** FPGA\_DIR, **--fpga-dir** FPGA\_DIR

  Path to directory for the FPGA source tree. Defaults to the FPGA source tree of the current repo.

- **-B** BUILD\_DIR, **--build-dir** BUILD\_DIR

  Path to directory where the image core and and build artifacts will be generated. Defaults to "build-\<image-core-name\>" in the base directory.

- **-O** BUILD\_OUTPUT\_DIR, **--build-output-dir** BUILD\_OUTPUT\_DIR

  Path to directory for final FPGA build outputs. Defaults to "build" in the base directory.

- **-E** BUILD\_IP\_DIR, **--build-ip-dir** BUILD\_IP\_DIR

  Path to directory for IP build artifacts. Defaults to "build-ip" in the base directory.

- **-o** IMAGE\_CORE\_OUTPUT, **--image-core-output** IMAGE\_CORE\_OUTPUT

  DEPRECATED! This has been replaced by **--build-dir**.

- **-x** ROUTER\_HEX\_OUTPUT, **--router-hex-output** ROUTER\_HEX\_OUTPUT

  DEPRECATED! This option will be ignored.

- **-I** INCLUDE\_DIR, **--include-dir** INCLUDE\_DIR

  Path to directory of the RFNoC Out-of-Tree module

- **-b** GRC\_BLOCKS, **--grc-blocks** GRC\_BLOCKS

  Path to directory of GRC block descriptions (needed for **--grc-config** only)

- **-l** LOG\_LEVEL, **--log-level** LOG\_LEVEL

  Adjust log level

- **-R**, **--reuse**

  Reuse existing files (do not regenerate image core).

- **-G**, **--generate-only**

  Just generate files without building the FPGA

- **-W**, **--ignore-warnings**

  Run build even when there are warnings in the build process.

- **-S** SECURE\_CORE, **--secure-core** SECURE\_CORE

  Build a secure image core instead of a bitfile. This argument provides the name of the generated YAML.

- **-K** SECURE\_KEY, **--secure-key** SECURE\_KEY

  Path to encryption key file to use for secure core.

- **-d** DEVICE, **--device** DEVICE

  Device to be programmed \[x300, x310, e310, e320, n300, n310, n320, x410, x440\]. Needs to be specified either here, or in the configuration file.

- **-n** IMAGE\_CORE\_NAME, **--image-core-name** IMAGE\_CORE\_NAME, **--image\_core\_name** IMAGE\_CORE\_NAME

  Name to use for the RFNoC image core. Defaults to name of the image core YML file, without the extension.

- **-t** TARGET, **--target** TARGET

  Build target (e.g. X310\_HG, N320\_XG, ...). Needs to be specified either here, on the configuration file.

- **-g**, **--GUI**

  Open Vivado GUI during the FPGA building process.

- **-Y**, **--SYNTH**

  Stop the FPGA build process after Synthesis.

- **-C**, **--CHECK**

  Run elaboration only to check HDL syntax.

- **-s**, **--save-project**

  Save Vivado project to disk.

- **-P**, **--ip-only**

  Build only the required IPs.

- **-j** JOBS, **--jobs** JOBS

  Number of parallel jobs to use with make.

- **-c**, **--clean-all**

  Cleans the IP before a new build.

- **-p** VIVADO\_PATH, **--vivado-path** VIVADO\_PATH

  Path to the base install for Xilinx Vivado if not in default location (e.g., /tools/Xilinx/Vivado).

- **-H**, **--no-hash**

  Do not include source YAML hash in the generated source code.

- **-D**, **--no-date**

  Do not include date or time in the generated source code.

- **--color** {never,auto,always}

  Enable colorful output. When set to 'auto' will only show color output in TTY environments (e.g., interactive shells).

## DESCRIPTION

This tool takes a YAML configuration file and generates an FPGA bitfile that can be used with an RFNoC-capable UHD device. The YAML configuration file describes the RFNoC blocks that are to be included in the FPGA image, along with the connections between the blocks, and any additional configuration that is required for the blocks.

## SEE ALSO

UHD documentation: **https://uhd.readthedocs.io/**

Other UHD programs:

[uhd\_cal\_tx\_dc\_offset(1)](/uhd_cal_tx_dc_offset/1.md) [uhd\_cal\_rx\_iq\_balance(1)](/uhd_cal_rx_iq_balance/1.md) [uhd\_images\_downloader(1)](/uhd_images_downloader/1.md) [uhd\_config\_info(1)](/uhd_config_info/1.md) [uhd\_find\_devices(1)](/uhd_find_devices/1.md)

## AUTHOR

This manual page was written by Maitland Bottoms for the Debian project (but may be used by others).

## COPYRIGHT

Copyright (c) 2020 Ettus Research LLC

This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more details.