---
name: "nvme_feat-libnvme3"
section: "2"
platform: "linux"
package: "nvme-cli"
version: "3.2-1"
release: "Arch Linux 2026-11-01"
platforms: ["linux"]
url: "https://new.carta.tech/nvme_feat-libnvme3"
---

# nvme\_feat-libnvme3(2)

Features Access Shifts/Masks values

## NAME

enum nvme\_feat - Features Access Shifts/Masks values

## SYNOPSIS

enum nvme\_feat {\
     **NVME\_FEAT\_ARBITRATION\_BURST\_SHIFT** , \
\
     **NVME\_FEAT\_ARBITRATION\_BURST\_MASK** , \
\
     **NVME\_FEAT\_ARBITRATION\_LPW\_SHIFT** , \
\
     **NVME\_FEAT\_ARBITRATION\_LPW\_MASK** , \
\
     **NVME\_FEAT\_ARBITRATION\_MPW\_SHIFT** , \
\
     **NVME\_FEAT\_ARBITRATION\_MPW\_MASK** , \
\
     **NVME\_FEAT\_ARBITRATION\_HPW\_SHIFT** , \
\
     **NVME\_FEAT\_ARBITRATION\_HPW\_MASK** , \
\
     **NVME\_FEAT\_PWRMGMT\_PS\_SHIFT** , \
\
     **NVME\_FEAT\_PWRMGMT\_PS\_MASK** , \
\
     **NVME\_FEAT\_PWRMGMT\_WH\_SHIFT** , \
\
     **NVME\_FEAT\_PWRMGMT\_WH\_MASK** , \
\
     **NVME\_FEAT\_PWRMGMT\_IIELL\_SHIFT** , \
\
     **NVME\_FEAT\_PWRMGMT\_IIELL\_MASK** , \
\
     **NVME\_FEAT\_LBAR\_NR\_SHIFT** , \
\
     **NVME\_FEAT\_LBAR\_NR\_MASK** , \
\
     **NVME\_FEAT\_TT\_TMPTH\_SHIFT** , \
\
     **NVME\_FEAT\_TT\_TMPTH\_MASK** , \
\
     **NVME\_FEAT\_TT\_TMPSEL\_SHIFT** , \
\
     **NVME\_FEAT\_TT\_TMPSEL\_MASK** , \
\
     **NVME\_FEAT\_TT\_THSEL\_SHIFT** , \
\
     **NVME\_FEAT\_TT\_THSEL\_MASK** , \
\
     **NVME\_FEAT\_TT\_TMPTHH\_SHIFT** , \
\
     **NVME\_FEAT\_TT\_TMPTHH\_MASK** , \
\
     **NVME\_FEAT\_ERROR\_RECOVERY\_TLER\_SHIFT** , \
\
     **NVME\_FEAT\_ERROR\_RECOVERY\_TLER\_MASK** , \
\
     **NVME\_FEAT\_ERROR\_RECOVERY\_DULBE\_SHIFT** , \
\
     **NVME\_FEAT\_ERROR\_RECOVERY\_DULBE\_MASK** , \
\
     **NVME\_FEAT\_VWC\_WCE\_SHIFT** , \
\
     **NVME\_FEAT\_VWC\_WCE\_MASK** , \
\
     **NVME\_FEAT\_NRQS\_NSQR\_SHIFT** , \
\
     **NVME\_FEAT\_NRQS\_NSQR\_MASK** , \
\
     **NVME\_FEAT\_NRQS\_NCQR\_SHIFT** , \
\
     **NVME\_FEAT\_NRQS\_NCQR\_MASK** , \
\
     **NVME\_FEAT\_IRQC\_THR\_SHIFT** , \
\
     **NVME\_FEAT\_IRQC\_THR\_MASK** , \
\
     **NVME\_FEAT\_IRQC\_TIME\_SHIFT** , \
\
     **NVME\_FEAT\_IRQC\_TIME\_MASK** , \
\
     **NVME\_FEAT\_ICFG\_IV\_SHIFT** , \
\
     **NVME\_FEAT\_ICFG\_IV\_MASK** , \
\
     **NVME\_FEAT\_ICFG\_CD\_SHIFT** , \
\
     **NVME\_FEAT\_ICFG\_CD\_MASK** , \
\
     **NVME\_FEAT\_WA\_DN\_SHIFT** , \
\
     **NVME\_FEAT\_WA\_DN\_MASK** , \
\
     **NVME\_FEAT\_AE\_SMART\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_SMART\_MASK** , \
\
     **NVME\_FEAT\_AE\_NAN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_NAN\_MASK** , \
\
     **NVME\_FEAT\_AE\_FW\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_FW\_MASK** , \
\
     **NVME\_FEAT\_AE\_TELEM\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_TELEM\_MASK** , \
\
     **NVME\_FEAT\_AE\_ANA\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_ANA\_MASK** , \
\
     **NVME\_FEAT\_AE\_PLA\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_PLA\_MASK** , \
\
     **NVME\_FEAT\_AE\_LBAS\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_LBAS\_MASK** , \
\
     **NVME\_FEAT\_AE\_EGA\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_EGA\_MASK** , \
\
     **NVME\_FEAT\_AE\_NNSSHDN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_NNSSHDN\_MASK** , \
\
     **NVME\_FEAT\_AE\_TTHRY\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_TTHRY\_MASK** , \
\
     **NVME\_FEAT\_AE\_RASSN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_RASSN\_MASK** , \
\
     **NVME\_FEAT\_AE\_RGRP0\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_RGRP0\_MASK** , \
\
     **NVME\_FEAT\_AE\_ANSAN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_ANSAN\_MASK** , \
\
     **NVME\_FEAT\_AE\_CCRCN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_CCRCN\_MASK** , \
\
     **NVME\_FEAT\_AE\_LHCN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_LHCN\_MASK** , \
\
     **NVME\_FEAT\_AE\_RLCCN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_RLCCN\_MASK** , \
\
     **NVME\_FEAT\_AE\_ZDCN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_ZDCN\_MASK** , \
\
     **NVME\_FEAT\_AE\_PMDRLPCN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_PMDRLPCN\_MASK** , \
\
     **NVME\_FEAT\_AE\_ADLPCN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_ADLPCN\_MASK** , \
\
     **NVME\_FEAT\_AE\_HDLPCN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_HDLPCN\_MASK** , \
\
     **NVME\_FEAT\_AE\_DLPCN\_SHIFT** , \
\
     **NVME\_FEAT\_AE\_DLPCN\_MASK** , \
\
     **NVME\_FEAT\_APST\_APSTE\_SHIFT** , \
\
     **NVME\_FEAT\_APST\_APSTE\_MASK** , \
\
     **NVME\_FEAT\_HMEM\_EHM\_SHIFT** , \
\
     **NVME\_FEAT\_HMEM\_EHM\_MASK** , \
\
     **NVME\_FEAT\_KATO\_TIMEOUT\_SHIFT** , \
\
     **NVME\_FEAT\_KATO\_TIMEOUT\_MASK** , \
\
     **NVME\_FEAT\_HCTM\_TMT2\_SHIFT** , \
\
     **NVME\_FEAT\_HCTM\_TMT2\_MASK** , \
\
     **NVME\_FEAT\_HCTM\_TMT1\_SHIFT** , \
\
     **NVME\_FEAT\_HCTM\_TMT1\_MASK** , \
\
     **NVME\_FEAT\_NOPS\_NOPPME\_SHIFT** , \
\
     **NVME\_FEAT\_NOPS\_NOPPME\_MASK** , \
\
     **NVME\_FEAT\_RRL\_NVMSETID\_SHIFT** , \
\
     **NVME\_FEAT\_RRL\_NVMSETID\_MASK** , \
\
     **NVME\_FEAT\_RRL\_RRL\_SHIFT** , \
\
     **NVME\_FEAT\_RRL\_RRL\_MASK** , \
\
     **NVME\_FEAT\_PLM\_NVMSETID\_SHIFT** , \
\
     **NVME\_FEAT\_PLM\_NVMSETID\_MASK** , \
\
     **NVME\_FEAT\_PLM\_LPE\_SHIFT** , \
\
     **NVME\_FEAT\_PLM\_LPE\_MASK** , \
\
     **NVME\_FEAT\_PLMW\_WS\_SHIFT** , \
\
     **NVME\_FEAT\_PLMW\_WS\_MASK** , \
\
     **NVME\_FEAT\_LBAS\_LSIRI\_SHIFT** , \
\
     **NVME\_FEAT\_LBAS\_LSIRI\_MASK** , \
\
     **NVME\_FEAT\_LBAS\_LSIPI\_SHIFT** , \
\
     **NVME\_FEAT\_LBAS\_LSIPI\_MASK** , \
\
     **NVME\_FEAT\_SC\_NODRM\_SHIFT** , \
\
     **NVME\_FEAT\_SC\_NODRM\_MASK** , \
\
     **NVME\_FEAT\_EG\_ENDGID\_SHIFT** , \
\
     **NVME\_FEAT\_EG\_ENDGID\_MASK** , \
\
     **NVME\_FEAT\_EG\_EGCW\_SHIFT** , \
\
     **NVME\_FEAT\_EG\_EGCW\_MASK** , \
\
     **NVME\_FEAT\_FDPE\_PHNDL\_SHIFT** , \
\
     **NVME\_FEAT\_FDPE\_PHNDL\_MASK** , \
\
     **NVME\_FEAT\_FDPE\_NOET\_SHIFT** , \
\
     **NVME\_FEAT\_FDPE\_NOET\_MASK** , \
\
     **NVME\_FEAT\_SPM\_PBSLC\_SHIFT** , \
\
     **NVME\_FEAT\_SPM\_PBSLC\_MASK** , \
\
     **NVME\_FEAT\_HOSTID\_EXHID\_SHIFT** , \
\
     **NVME\_FEAT\_HOSTID\_EXHID\_MASK** , \
\
     **NVME\_FEAT\_RM\_REGPRE\_SHIFT** , \
\
     **NVME\_FEAT\_RM\_REGPRE\_MASK** , \
\
     **NVME\_FEAT\_RM\_RESREL\_SHIFT** , \
\
     **NVME\_FEAT\_RM\_RESREL\_MASK** , \
\
     **NVME\_FEAT\_RM\_RESPRE\_SHIFT** , \
\
     **NVME\_FEAT\_RM\_RESPRE\_MASK** , \
\
     **NVME\_FEAT\_RP\_PTPL\_SHIFT** , \
\
     **NVME\_FEAT\_RP\_PTPL\_MASK** , \
\
     **NVME\_FEAT\_WP\_WPS\_SHIFT** , \
\
     **NVME\_FEAT\_WP\_WPS\_MASK** , \
\
     **NVME\_FEAT\_IOCSP\_IOCSCI\_SHIFT** , \
\
     **NVME\_FEAT\_IOCSP\_IOCSCI\_MASK** , \
\
     **NVME\_FEAT\_SPINUP\_CONTROL\_SHIFT** , \
\
     **NVME\_FEAT\_SPINUP\_CONTROL\_MASK** , \
\
     **NVME\_FEAT\_PLS\_MODE\_SHIFT** , \
\
     **NVME\_FEAT\_PLS\_MODE\_MASK** , \
\
     **NVME\_FEAT\_PERFC\_ATTRI\_SHIFT** , \
\
     **NVME\_FEAT\_PERFC\_ATTRI\_MASK** , \
\
     **NVME\_FEAT\_PERFC\_RVSPA\_SHIFT** , \
\
     **NVME\_FEAT\_PERFC\_RVSPA\_MASK** , \
\
     **NVME\_FEAT\_PERFC\_ATTRTYP\_SHIFT** , \
\
     **NVME\_FEAT\_PERFC\_ATTRTYP\_MASK** , \
\
     **NVME\_FEAT\_FDP\_ENABLED\_SHIFT** , \
\
     **NVME\_FEAT\_FDP\_ENABLED\_MASK** , \
\
     **NVME\_FEAT\_FDP\_INDEX\_SHIFT** , \
\
     **NVME\_FEAT\_FDP\_INDEX\_MASK** , \
\
     **NVME\_FEAT\_FDP\_EVENTS\_ENABLE\_SHIFT** , \
\
     **NVME\_FEAT\_FDP\_EVENTS\_ENABLE\_MASK** , \
\
     **NVME\_FEAT\_HOST\_ID\_EXHID\_SHIFT** , \
\
     **NVME\_FEAT\_HOST\_ID\_EXHID\_MASK** , \
\
     **NVME\_FEAT\_BPWPC\_BP0WPS\_SHIFT** , \
\
     **NVME\_FEAT\_BPWPC\_BP0WPS\_MASK** , \
\
     **NVME\_FEAT\_BPWPC\_BP1WPS\_SHIFT** , \
\
     **NVME\_FEAT\_BPWPC\_BP1WPS\_MASK** , \
\
     **NVME\_FEAT\_SANITIZE\_NODRM\_SHIFT** , \
\
     **NVME\_FEAT\_SANITIZE\_NODRM\_MASK** , \
\
     **NVME\_FEAT\_RESP\_PTPL\_SHIFT** , \
\
     **NVME\_FEAT\_RESP\_PTPL\_MASK** , \
\
     **NVME\_FEAT\_CDP\_CHPS** , \
\
     **NVME\_FEAT\_CDP\_PERFS** , \
\
     **NVME\_FEAT\_CDP\_PERID\_SHIFT** , \
\
     **NVME\_FEAT\_CDP\_PERID\_MASK** , \
\
     **NVME\_FEAT\_CDP\_PMDSS** , \
\
     **NVME\_FEAT\_CDP\_PPSC** , \
\
     **NVME\_FEAT\_POWER\_LIMIT\_PLV\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_LIMIT\_PLV\_MASK** , \
\
     **NVME\_FEAT\_POWER\_LIMIT\_PLS\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_LIMIT\_PLS\_MASK** , \
\
     **NVME\_FEAT\_POWER\_THRESH\_PTV\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_THRESH\_PTV\_MASK** , \
\
     **NVME\_FEAT\_POWER\_THRESH\_PTS\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_THRESH\_PTS\_MASK** , \
\
     **NVME\_FEAT\_POWER\_THRESH\_PMTS\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_THRESH\_PMTS\_MASK** , \
\
     **NVME\_FEAT\_POWER\_THRESH\_EPT\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_THRESH\_EPT\_MASK** , \
\
     **NVME\_FEAT\_POWER\_MEAS\_ACT\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_MEAS\_ACT\_MASK** , \
\
     **NVME\_FEAT\_POWER\_MEAS\_PMTS\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_MEAS\_PMTS\_MASK** , \
\
     **NVME\_FEAT\_POWER\_MEAS\_SMT\_SHIFT** , \
\
     **NVME\_FEAT\_POWER\_MEAS\_SMT\_MASK** , \
\
     **NVME\_FEAT\_VOLTAGE\_THRESHOLD\_UVT\_SHIFT** , \
\
     **NVME\_FEAT\_VOLTAGE\_THRESHOLD\_UVT\_MASK** , \
\
     **NVME\_FEAT\_VOLTAGE\_THRESHOLD\_OVT\_SHIFT** , \
\
     **NVME\_FEAT\_VOLTAGE\_THRESHOLD\_OVT\_MASK** , \
\
     **NVME\_FEAT\_VOLTAGE\_THRESHOLD\_EVT** , \
\
     **NVME\_FEAT\_VOLTAGE\_THRESHOLD\_VSENS\_SHIFT** , \
\
     **NVME\_FEAT\_VOLTAGE\_THRESHOLD\_VSENS\_MASK** , \
\
     **NVME\_FEAT\_VOLTAGE\_MEASUREMENT\_ACT\_SHIFT** , \
\
     **NVME\_FEAT\_VOLTAGE\_MEASUREMENT\_ACT\_MASK** , \
\
     **NVME\_FEAT\_RATE\_LIMITING\_TID\_SHIFT** , \
\
     **NVME\_FEAT\_RATE\_LIMITING\_TID\_MASK** , \
\
     **NVME\_FEAT\_RATE\_LIMITING\_TGT\_SHIFT** , \
\
     **NVME\_FEAT\_RATE\_LIMITING\_TGT\_MASK**

};

## Constants

- NVME\_FEAT\_ARBITRATION\_BURST\_SHIFT

  - NVME\_FEAT\_ARBITRATION\_BURST\_MASK

  - NVME\_FEAT\_ARBITRATION\_LPW\_SHIFT

  - NVME\_FEAT\_ARBITRATION\_LPW\_MASK

  - NVME\_FEAT\_ARBITRATION\_MPW\_SHIFT

  - NVME\_FEAT\_ARBITRATION\_MPW\_MASK

  - NVME\_FEAT\_ARBITRATION\_HPW\_SHIFT

  - NVME\_FEAT\_ARBITRATION\_HPW\_MASK

  - NVME\_FEAT\_PWRMGMT\_PS\_SHIFT

  - NVME\_FEAT\_PWRMGMT\_PS\_MASK

  - NVME\_FEAT\_PWRMGMT\_WH\_SHIFT

  - NVME\_FEAT\_PWRMGMT\_WH\_MASK

  - NVME\_FEAT\_PWRMGMT\_IIELL\_SHIFT

  Shift amount to set/get the Idle I/O Exit Latency Limit (IIELL), in units of 100 microseconds

- NVME\_FEAT\_PWRMGMT\_IIELL\_MASK

  Mask to set/get IIELL

- NVME\_FEAT\_LBAR\_NR\_SHIFT

  - NVME\_FEAT\_LBAR\_NR\_MASK

  - NVME\_FEAT\_TT\_TMPTH\_SHIFT

  - NVME\_FEAT\_TT\_TMPTH\_MASK

  - NVME\_FEAT\_TT\_TMPSEL\_SHIFT

  - NVME\_FEAT\_TT\_TMPSEL\_MASK

  - NVME\_FEAT\_TT\_THSEL\_SHIFT

  - NVME\_FEAT\_TT\_THSEL\_MASK

  - NVME\_FEAT\_TT\_TMPTHH\_SHIFT

  - NVME\_FEAT\_TT\_TMPTHH\_MASK

  - NVME\_FEAT\_ERROR\_RECOVERY\_TLER\_SHIFT

  - NVME\_FEAT\_ERROR\_RECOVERY\_TLER\_MASK

  - NVME\_FEAT\_ERROR\_RECOVERY\_DULBE\_SHIFT

  - NVME\_FEAT\_ERROR\_RECOVERY\_DULBE\_MASK

  - NVME\_FEAT\_VWC\_WCE\_SHIFT

  - NVME\_FEAT\_VWC\_WCE\_MASK

  - NVME\_FEAT\_NRQS\_NSQR\_SHIFT

  - NVME\_FEAT\_NRQS\_NSQR\_MASK

  - NVME\_FEAT\_NRQS\_NCQR\_SHIFT

  - NVME\_FEAT\_NRQS\_NCQR\_MASK

  - NVME\_FEAT\_IRQC\_THR\_SHIFT

  - NVME\_FEAT\_IRQC\_THR\_MASK

  - NVME\_FEAT\_IRQC\_TIME\_SHIFT

  - NVME\_FEAT\_IRQC\_TIME\_MASK

  - NVME\_FEAT\_ICFG\_IV\_SHIFT

  - NVME\_FEAT\_ICFG\_IV\_MASK

  - NVME\_FEAT\_ICFG\_CD\_SHIFT

  - NVME\_FEAT\_ICFG\_CD\_MASK

  - NVME\_FEAT\_WA\_DN\_SHIFT

  - NVME\_FEAT\_WA\_DN\_MASK

  - NVME\_FEAT\_AE\_SMART\_SHIFT

  - NVME\_FEAT\_AE\_SMART\_MASK

  - NVME\_FEAT\_AE\_NAN\_SHIFT

  - NVME\_FEAT\_AE\_NAN\_MASK

  - NVME\_FEAT\_AE\_FW\_SHIFT

  - NVME\_FEAT\_AE\_FW\_MASK

  - NVME\_FEAT\_AE\_TELEM\_SHIFT

  - NVME\_FEAT\_AE\_TELEM\_MASK

  - NVME\_FEAT\_AE\_ANA\_SHIFT

  - NVME\_FEAT\_AE\_ANA\_MASK

  - NVME\_FEAT\_AE\_PLA\_SHIFT

  - NVME\_FEAT\_AE\_PLA\_MASK

  - NVME\_FEAT\_AE\_LBAS\_SHIFT

  - NVME\_FEAT\_AE\_LBAS\_MASK

  - NVME\_FEAT\_AE\_EGA\_SHIFT

  - NVME\_FEAT\_AE\_EGA\_MASK

  - NVME\_FEAT\_AE\_NNSSHDN\_SHIFT

  - NVME\_FEAT\_AE\_NNSSHDN\_MASK

  - NVME\_FEAT\_AE\_TTHRY\_SHIFT

  - NVME\_FEAT\_AE\_TTHRY\_MASK

  - NVME\_FEAT\_AE\_RASSN\_SHIFT

  - NVME\_FEAT\_AE\_RASSN\_MASK

  - NVME\_FEAT\_AE\_RGRP0\_SHIFT

  - NVME\_FEAT\_AE\_RGRP0\_MASK

  - NVME\_FEAT\_AE\_ANSAN\_SHIFT

  - NVME\_FEAT\_AE\_ANSAN\_MASK

  - NVME\_FEAT\_AE\_CCRCN\_SHIFT

  - NVME\_FEAT\_AE\_CCRCN\_MASK

  - NVME\_FEAT\_AE\_LHCN\_SHIFT

  - NVME\_FEAT\_AE\_LHCN\_MASK

  - NVME\_FEAT\_AE\_RLCCN\_SHIFT

  Shift amount to get/set the Rate Limiting Configuration Change Notices (RLCCN)

- NVME\_FEAT\_AE\_RLCCN\_MASK

  Mask to get/set RLCCN

- NVME\_FEAT\_AE\_ZDCN\_SHIFT

  - NVME\_FEAT\_AE\_ZDCN\_MASK

  - NVME\_FEAT\_AE\_PMDRLPCN\_SHIFT

  - NVME\_FEAT\_AE\_PMDRLPCN\_MASK

  - NVME\_FEAT\_AE\_ADLPCN\_SHIFT

  - NVME\_FEAT\_AE\_ADLPCN\_MASK

  - NVME\_FEAT\_AE\_HDLPCN\_SHIFT

  - NVME\_FEAT\_AE\_HDLPCN\_MASK

  - NVME\_FEAT\_AE\_DLPCN\_SHIFT

  - NVME\_FEAT\_AE\_DLPCN\_MASK

  - NVME\_FEAT\_APST\_APSTE\_SHIFT

  - NVME\_FEAT\_APST\_APSTE\_MASK

  - NVME\_FEAT\_HMEM\_EHM\_SHIFT

  - NVME\_FEAT\_HMEM\_EHM\_MASK

  - NVME\_FEAT\_KATO\_TIMEOUT\_SHIFT

  - NVME\_FEAT\_KATO\_TIMEOUT\_MASK

  - NVME\_FEAT\_HCTM\_TMT2\_SHIFT

  - NVME\_FEAT\_HCTM\_TMT2\_MASK

  - NVME\_FEAT\_HCTM\_TMT1\_SHIFT

  - NVME\_FEAT\_HCTM\_TMT1\_MASK

  - NVME\_FEAT\_NOPS\_NOPPME\_SHIFT

  - NVME\_FEAT\_NOPS\_NOPPME\_MASK

  - NVME\_FEAT\_RRL\_NVMSETID\_SHIFT

  - NVME\_FEAT\_RRL\_NVMSETID\_MASK

  - NVME\_FEAT\_RRL\_RRL\_SHIFT

  - NVME\_FEAT\_RRL\_RRL\_MASK

  - NVME\_FEAT\_PLM\_NVMSETID\_SHIFT

  - NVME\_FEAT\_PLM\_NVMSETID\_MASK

  - NVME\_FEAT\_PLM\_LPE\_SHIFT

  - NVME\_FEAT\_PLM\_LPE\_MASK

  - NVME\_FEAT\_PLMW\_WS\_SHIFT

  - NVME\_FEAT\_PLMW\_WS\_MASK

  - NVME\_FEAT\_LBAS\_LSIRI\_SHIFT

  - NVME\_FEAT\_LBAS\_LSIRI\_MASK

  - NVME\_FEAT\_LBAS\_LSIPI\_SHIFT

  - NVME\_FEAT\_LBAS\_LSIPI\_MASK

  - NVME\_FEAT\_SC\_NODRM\_SHIFT

  - NVME\_FEAT\_SC\_NODRM\_MASK

  - NVME\_FEAT\_EG\_ENDGID\_SHIFT

  - NVME\_FEAT\_EG\_ENDGID\_MASK

  - NVME\_FEAT\_EG\_EGCW\_SHIFT

  - NVME\_FEAT\_EG\_EGCW\_MASK

  - NVME\_FEAT\_FDPE\_PHNDL\_SHIFT

  - NVME\_FEAT\_FDPE\_PHNDL\_MASK

  - NVME\_FEAT\_FDPE\_NOET\_SHIFT

  - NVME\_FEAT\_FDPE\_NOET\_MASK

  - NVME\_FEAT\_SPM\_PBSLC\_SHIFT

  - NVME\_FEAT\_SPM\_PBSLC\_MASK

  - NVME\_FEAT\_HOSTID\_EXHID\_SHIFT

  - NVME\_FEAT\_HOSTID\_EXHID\_MASK

  - NVME\_FEAT\_RM\_REGPRE\_SHIFT

  - NVME\_FEAT\_RM\_REGPRE\_MASK

  - NVME\_FEAT\_RM\_RESREL\_SHIFT

  - NVME\_FEAT\_RM\_RESREL\_MASK

  - NVME\_FEAT\_RM\_RESPRE\_SHIFT

  - NVME\_FEAT\_RM\_RESPRE\_MASK

  - NVME\_FEAT\_RP\_PTPL\_SHIFT

  - NVME\_FEAT\_RP\_PTPL\_MASK

  - NVME\_FEAT\_WP\_WPS\_SHIFT

  - NVME\_FEAT\_WP\_WPS\_MASK

  - NVME\_FEAT\_IOCSP\_IOCSCI\_SHIFT

  - NVME\_FEAT\_IOCSP\_IOCSCI\_MASK

  - NVME\_FEAT\_SPINUP\_CONTROL\_SHIFT

  - NVME\_FEAT\_SPINUP\_CONTROL\_MASK

  - NVME\_FEAT\_PLS\_MODE\_SHIFT

  - NVME\_FEAT\_PLS\_MODE\_MASK

  - NVME\_FEAT\_PERFC\_ATTRI\_SHIFT

  - NVME\_FEAT\_PERFC\_ATTRI\_MASK

  - NVME\_FEAT\_PERFC\_RVSPA\_SHIFT

  - NVME\_FEAT\_PERFC\_RVSPA\_MASK

  - NVME\_FEAT\_PERFC\_ATTRTYP\_SHIFT

  - NVME\_FEAT\_PERFC\_ATTRTYP\_MASK

  - NVME\_FEAT\_FDP\_ENABLED\_SHIFT

  - NVME\_FEAT\_FDP\_ENABLED\_MASK

  - NVME\_FEAT\_FDP\_INDEX\_SHIFT

  - NVME\_FEAT\_FDP\_INDEX\_MASK

  - NVME\_FEAT\_FDP\_EVENTS\_ENABLE\_SHIFT

  - NVME\_FEAT\_FDP\_EVENTS\_ENABLE\_MASK

  - NVME\_FEAT\_HOST\_ID\_EXHID\_SHIFT

  - NVME\_FEAT\_HOST\_ID\_EXHID\_MASK

  - NVME\_FEAT\_BPWPC\_BP0WPS\_SHIFT

  - NVME\_FEAT\_BPWPC\_BP0WPS\_MASK

  - NVME\_FEAT\_BPWPC\_BP1WPS\_SHIFT

  - NVME\_FEAT\_BPWPC\_BP1WPS\_MASK

  - NVME\_FEAT\_SANITIZE\_NODRM\_SHIFT

  - NVME\_FEAT\_SANITIZE\_NODRM\_MASK

  - NVME\_FEAT\_RESP\_PTPL\_SHIFT

  - NVME\_FEAT\_RESP\_PTPL\_MASK

  - NVME\_FEAT\_CDP\_CHPS

  Change Personality Settings (Set Features Command Dword 13 only)

- NVME\_FEAT\_CDP\_PERFS

  Personality Freeze State (Set Features Command Dword 13, and Get Features Completion Queue Entry Dword 0)

- NVME\_FEAT\_CDP\_PERID\_SHIFT

  Shift amount to set/get the Personality Identifier (Set Features Command Dword 13, and Get Features Completion Queue Entry Dword 0)

- NVME\_FEAT\_CDP\_PERID\_MASK

  Mask to set/get the Personality Identifier

- NVME\_FEAT\_CDP\_PMDSS

  Personality Manufacturing Default Settings State (Get Features Completion Queue Entry Dword 0 only)

- NVME\_FEAT\_CDP\_PPSC

  Pending Personality Settings Change (Get Features Completion Queue Entry Dword 0 only)

- NVME\_FEAT\_POWER\_LIMIT\_PLV\_SHIFT

  - NVME\_FEAT\_POWER\_LIMIT\_PLV\_MASK

  - NVME\_FEAT\_POWER\_LIMIT\_PLS\_SHIFT

  - NVME\_FEAT\_POWER\_LIMIT\_PLS\_MASK

  - NVME\_FEAT\_POWER\_THRESH\_PTV\_SHIFT

  - NVME\_FEAT\_POWER\_THRESH\_PTV\_MASK

  - NVME\_FEAT\_POWER\_THRESH\_PTS\_SHIFT

  - NVME\_FEAT\_POWER\_THRESH\_PTS\_MASK

  - NVME\_FEAT\_POWER\_THRESH\_PMTS\_SHIFT

  - NVME\_FEAT\_POWER\_THRESH\_PMTS\_MASK

  - NVME\_FEAT\_POWER\_THRESH\_EPT\_SHIFT

  - NVME\_FEAT\_POWER\_THRESH\_EPT\_MASK

  - NVME\_FEAT\_POWER\_MEAS\_ACT\_SHIFT

  - NVME\_FEAT\_POWER\_MEAS\_ACT\_MASK

  - NVME\_FEAT\_POWER\_MEAS\_PMTS\_SHIFT

  - NVME\_FEAT\_POWER\_MEAS\_PMTS\_MASK

  - NVME\_FEAT\_POWER\_MEAS\_SMT\_SHIFT

  - NVME\_FEAT\_POWER\_MEAS\_SMT\_MASK

  - NVME\_FEAT\_VOLTAGE\_THRESHOLD\_UVT\_SHIFT

  Shift amount to set/get the Undervoltage Threshold (UVT)

- NVME\_FEAT\_VOLTAGE\_THRESHOLD\_UVT\_MASK

  Mask to set/get UVT

- NVME\_FEAT\_VOLTAGE\_THRESHOLD\_OVT\_SHIFT

  Shift amount to set/get the Overvoltage Threshold (OVT)

- NVME\_FEAT\_VOLTAGE\_THRESHOLD\_OVT\_MASK

  Mask to set/get OVT

- NVME\_FEAT\_VOLTAGE\_THRESHOLD\_EVT

  Enable Voltage Threshold

- NVME\_FEAT\_VOLTAGE\_THRESHOLD\_VSENS\_SHIFT

  Shift amount to set/get the Voltage Sensor Select (VSENS), see *enum nvme\_voltage\_sensor*

- NVME\_FEAT\_VOLTAGE\_THRESHOLD\_VSENS\_MASK

  Mask to set/get VSENS

- NVME\_FEAT\_VOLTAGE\_MEASUREMENT\_ACT\_SHIFT

  Shift amount to set the Action (ACT), see *enum* *nvme\_voltage\_measurement\_act*

- NVME\_FEAT\_VOLTAGE\_MEASUREMENT\_ACT\_MASK

  Mask to set ACT

- NVME\_FEAT\_RATE\_LIMITING\_TID\_SHIFT

  Shift amount to set/get the Target Identifier (TID)

- NVME\_FEAT\_RATE\_LIMITING\_TID\_MASK

  Mask to set/get TID

- NVME\_FEAT\_RATE\_LIMITING\_TGT\_SHIFT

  Shift amount to set/get the Target (TGT), see *enum nvme\_rate\_limiting\_target*

- NVME\_FEAT\_RATE\_LIMITING\_TGT\_MASK

  Mask to set/get TGT