---
name: "hwloc_obj_attr_u_hwloc_bridge_attr_s"
section: "3"
platform: "linux"
package: "hwloc"
version: "2.15.0-1"
release: "Arch Linux 2026-11-01"
platforms: ["linux"]
url: "https://new.carta.tech/hwloc_obj_attr_u_hwloc_bridge_attr_s"
---

# hwloc\_obj\_attr\_u\_hwloc\_bridge\_attr\_s(3)

## NAME

hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s

## SYNOPSIS

\#include \<hwloc.h\>

### Data Fields

union {\
    struct **hwloc\_pcidev\_attr\_s** **pci**\
 } **upstream**\
 **hwloc\_obj\_bridge\_type\_t** **upstream\_type**\
 union {\
    struct {\
       unsigned short **domain**\
       unsigned char **secondary\_bus**\
       unsigned char **subordinate\_bus**\
    } **pci**\
 } **downstream**\
 **hwloc\_obj\_bridge\_type\_t** **downstream\_type**\
 unsigned **depth**\

## Detailed Description

Bridge specific Object Attributes.

## Field Documentation

### unsigned hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::depth

### unsigned short hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::domain

Domain number the downstream PCI buses. Only 16bits PCI domains are supported by default.

### union { ... } hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::downstream

### hwloc\_obj\_bridge\_type\_t hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::downstream\_type

Downstream Bridge type.

### struct { ... } hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::pci

### struct hwloc\_pcidev\_attr\_s hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::pci

PCI attribute of the upstream part as a PCI device.

### unsigned char hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::secondary\_bus

First PCI bus number below the bridge.

### unsigned char hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::subordinate\_bus

Highest PCI bus number below the bridge.

### union { ... } hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::upstream

### hwloc\_obj\_bridge\_type\_t hwloc\_obj\_attr\_u::hwloc\_bridge\_attr\_s::upstream\_type

Upstream Bridge type.

## Author

Generated automatically by Doxygen for Hardware Locality (hwloc) from the source code.