---
name: "devcfg"
section: "4"
platform: "freebsd"
package: "base"
version: "16.0-CURRENT-20261027-61c70dc16a79"
release: "FreeBSD 16.0-CURRENT (2026-10-27)"
platforms: ["freebsd"]
url: "https://new.carta.tech/devcfg"
---

# devcfg(4)

Zynq PL device config interface

Part of [devcfg(4)](/devcfg/4.md).

## NAME

**devcfg** – Zynq PL device config interface

## SYNOPSIS

**device** **devcfg**

## DESCRIPTION

The special file */dev/devcfg* can be used to configure the PL (FPGA) section of the Xilinx Zynq-7000.

On the first write to the character device at file offset 0, the **devcfg** driver asserts the top-level PL reset signals, disables the PS-PL level shifters, and clears the PL configuration. Write data is sent to the PCAP (processor configuration access port). When the PL asserts the DONE signal, the devcfg driver will enable the level shifters and release the top-level PL reset signals.

The PL (FPGA) can be configured by writing the bitstream to the character device like this:

```
cat design.bit.bin > /dev/devcfg
```

The file should not be confused with the .bit file output by the FPGA design tools. It is the binary form of the configuration bitstream. The Xilinx **promgen** tool can do the conversion:

```
promgen -b -w -p bin -data_width 32 -u 0 design.bit -o design.bit.bin
```

## SYSCTL VARIABLES

The **devcfg** driver provides the following [sysctl(8)](/sysctl/8.md) variables:

- *hw.fpga.pl\_done*

  This variable always reflects the status of the PL's DONE signal. A 1 means the PL section has been properly programmed.

- *hw.fpga.en\_level\_shifters*

  This variable controls if the PS-PL level shifters are enabled after the PL section has been reconfigured. This variable is 1 by default but setting it to 0 allows the PL section to be programmed with configurations that do not interface to the PS section of the part. Changing this value has no effect on the level shifters until the next device reconfiguration.

## FILES

- */dev/devcfg*

  Character device for the **devcfg** driver.

## SEE ALSO

Zynq-7000 SoC Technical Reference Manual (Xilinx doc UG585)

## AUTHORS

Thomas Skibo