NAME
Cver - Verilog Simulator
SYNOPSIS
cver [options][verilogfiles...]
DESCRIPTION
Cver is a full 1995 IEEE P1364 standard Verilog simulator. This is "GPL Cver", the GPL version.
AUTHOR
Pragmatic C Software Corp.
This manual page was written by NIIBE Yutaka <[email protected]>, for the Debian project (but may be used by others).