---
name: "cpu_sgx_t"
section: "3"
platform: "linux"
package: "libcpuid"
version: "0.8.2-1"
release: "Arch Linux 2026-11-01"
platforms: ["linux"]
url: "https://new.carta.tech/cpu_sgx_t"
---

# cpu\_sgx\_t(3)

This contains information about SGX features of the processor Example usage:

## NAME

cpu\_sgx\_t - This contains information about SGX features of the processor Example usage:

## SYNOPSIS

\#include \<libcpuid.h\>

### Data Fields

uint32\_t **present**\
 uint8\_t **max\_enclave\_32bit**\
 uint8\_t **max\_enclave\_64bit**\
 uint8\_t **flags** \[SGX\_FLAGS\_MAX\]\
 int **num\_epc\_sections**\
 uint32\_t **misc\_select**\
 uint64\_t **secs\_attributes**\
 uint64\_t **secs\_xfrm**\

## Detailed Description

This contains information about SGX features of the processor Example usage:

```
...
struct cpu_raw_data_t raw;
struct cpu_id_t id;
if (cpuid_get_raw_data(&raw) == 0 && cpu_identify(&raw, &id) == 0 && id.sgx.present) {
  printf("SGX is present.\n");
  printf("SGX1 instructions: %s.\n", id.sgx.flags[INTEL_SGX1] ? "present" : "absent");
  printf("SGX2 instructions: %s.\n", id.sgx.flags[INTEL_SGX2] ? "present" : "absent");
  printf("Max 32-bit enclave size: 2^%d bytes.\n", id.sgx.max_enclave_32bit);
  printf("Max 64-bit enclave size: 2^%d bytes.\n", id.sgx.max_enclave_64bit);
  for (int i = 0; i < id.sgx.num_epc_sections; i++) {
    struct cpu_epc_t epc = cpuid_get_epc(i, NULL);
    printf("EPC section #%d: address = %x, size = %d bytes.\n", epc.address, epc.size);
  }
} else {
  printf("SGX is not present.\n");
}
```

## Field Documentation

### uint8\_t cpu\_sgx\_t::flags\[SGX\_FLAGS\_MAX\]

contains SGX feature flags. See the **INTEL\_SGX\*** macros below.

### uint8\_t cpu\_sgx\_t::max\_enclave\_32bit

Max enclave size in 32-bit mode. This is a power-of-two value: if it is "31", then the max enclave size is 2^31 bytes (2 GiB).

### uint8\_t cpu\_sgx\_t::max\_enclave\_64bit

Max enclave size in 64-bit mode. This is a power-of-two value: if it is "36", then the max enclave size is 2^36 bytes (64 GiB).

### uint32\_t cpu\_sgx\_t::misc\_select

bit vector of the supported extended features that can be written to the MISC region of the SSA (Save State Area)

### int cpu\_sgx\_t::num\_epc\_sections

number of Enclave Page Cache (EPC) sections. Info for each section is available through the **cpuid\_get\_epc()** function

### uint32\_t cpu\_sgx\_t::present

Whether SGX is present (boolean)

### uint64\_t cpu\_sgx\_t::secs\_attributes

a bit vector of the attributes that can be set to SECS.ATTRIBUTES via ECREATE. Corresponds to bits 0-63 (incl.) of SECS.ATTRIBUTES.

### uint64\_t cpu\_sgx\_t::secs\_xfrm

a bit vector of the bits that can be set in the XSAVE feature request mask; Corresponds to bits 64-127 of SECS.ATTRIBUTES.

## Author

Generated automatically by Doxygen for libcpuid from the source code.