---
name: "Verilog::Std"
section: "3pm"
platform: "linux"
package: "libverilog-perl"
version: "3.482-2"
release: "Debian 13 (Trixie)"
platforms: ["linux"]
url: "https://new.carta.tech/Verilog::Std"
---

# Verilog::Std(3pm)

SystemVerilog Built-in std Package Definition

## NAME

Verilog::Std - SystemVerilog Built-in std Package Definition

## SYNOPSIS

Internally used by Verilog::SigParser, etc.

```
   use Verilog::Std;
   print Verilog::Std::std;
```

## DESCRIPTION

Verilog::Std contains the built-in "std" package required by the SystemVerilog standard.

## FUNCTIONS

- std({*standard*})

  Return the definition of the std package.  Optionally pass the language standard, defaulting to what Verilog::Language::language\_standard returns if unspecified.

## DISTRIBUTION

Verilog-Perl is part of the \<https://www.veripool.org/\> free Verilog EDA software tool suite.  The latest version is available from CPAN and from \<https://www.veripool.org/verilog-perl\>.

Copyright 2009-2024 by Wilson Snyder.  This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.

## AUTHORS

Wilson Snyder \<wsnyder@wsnyder.org\>

## SEE ALSO

Verilog-Perl